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Quantitative Evaluation of DC Microgrids Availability: Effects of System Architecture and Converter Topology Design Choices
Kwasinski, A.

This paper appears in: Power Electronics, IEEE Transactions on
Issue Date: March 2011
Volume: 26 Issue:3
On page(s): 835 - 851
ISSN: 0885-8993
INSPEC Accession Number: 12004923
This paper presents a quantitative method to evaluate dc microgrids availability by identifying and calculating minimum cut sets occurrence probability for different microgrid architectures and converter topologies. Hence, it provides planners with an essential tool to evaluate downtime costs and decide technology deployments based on quantitative risk assessments by allowing to compare the effect that converter topologies and microgrid architecture choices have on availability. Conventional architectures with single-input converters and alternative configurations with multiple-input converters (MICs) are considered. Calculations yield that all microgrid configurations except those utilizing center converters achieve similar availability of 6-nines. Three converter topologies are used as representatives of many other circuits. These three benchmark circuits are the boost, the isolated SEPIC (ISEPIC), and the current-source half-bridge. Marginal availability differences are observed for different circuit topology choices, although architectures with MICs are more sensitive to this choice. MICs and, in particular, the ISEPIC, are identified as good compromise options for dc microgrids source interfaces. The analysis also models availability influence of local energy storage, both in batteries and generators' fuel. These models provide a quantitative way of comparing dc microgrids with conventional backup energy systems. Calculations based on widely accepted data in industry supports the analysis.

Document Type:
Technical paper